Introduction

Dr. Prabhat Singh received his PhD from the National Institute of Technology, Hamirpur, Himachal Pradesh, India. Dr. Singh is a post- doctoral research associate in the school of electrical and computer science at IIT Bhubaneswar, Odisha. He is working in IIIT Manipur since July 2025, as Assistant Professor in ECE Department. His research revolves around different semiconductor devices including cryogenic CMOS, ultrascaled FETs, solar cells, Quantum Dots, etc. and their prospective applications. He is currently working on unravelling the interfacial behavior of different FET- based biological sensors using different classical and semi- quantum analytical models. His main areas of research interest include semiconductor device physics, solidstate devices, analog complementary metal oxide semiconductors (CMOS) integrated circuits, and nanoscale device design and simulation.

Qualification

  • Ph.D. in VLSI Design (Department of Electronics and Communication Engineering) — NIT Hamirpur, Himachal Pradesh (2024)
  • M.Tech. in Electronics and Communication Engineering Department — NIT Jalandhar, Punjab (2018)
  • B.Tech. in Electronics and Communication Engineering Department — MIET Meerut (Affiliated to AKTU), Uttar Pradesh (2015)

Experience

  • Assisatnt Professor — IIIT Manipur (July,2025 – Present).
  • Postdoctoral Fellow — IIT Bhubaneswar (July,2024 – July,2025).

Publications

  1. Singh, P., Raman, A., & Kumar, N. (2020). Spectroscopic and simulation analysis of facile PEDOT: PSS layer deposition-silicon for perovskite solar cell. Silicon, 12(8), 1769-1777.
  2. Singh, P., & Yadav, D. S. (2021). Impact of temperature on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region. Applied physics A, 127(9), 671.
  3. Singh, P., & Yadav, D. S. (2022). Assessing the impact of drain underlap perspective approach to investigate DC/RF to linearity behavior of L-shaped TFET. Silicon, 14(17), 11471-11481.
  4. Singh, P., & Yadav, D. S. (2022). Impactful study of f-shaped tunnel fet. Silicon, 14(10), 5359-5365.
  5. Singh, P., & Yadav, D. S. (2022). Design and investigation of f-shaped tunnel fet with enhanced analog/rf parameters. Silicon, 14(11), 6245-6260.
  6. Singh, P., & Yadav, D. S. (2022). Performance analysis of ITCs on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region. Applied Physics A, 128(7), 612.
  7. Singh, P., & Yadav, D. S. (2022). Impact of work function variation for enhanced electrostatic control with suppressed ambipolar behavior for dual gate L-TFET. Current Applied Physics, 44, 90-101.
  8. Singh, P., & Yadav, D. S. (2024). Assessment of temperature and ITCs on single gate L-shaped tunnel FET for low power high frequency application. Engineering Research Express, 6(1), 015319.
  9. Singh, P., Raman, A., Yadav, D. S., Kumar, N., Dixit, A., & Ansari, M. H. R. (2024). Ultra thin finger-like source region-based TFET: Temperature sensor. IEEE Sensors Letters, 8(5), 1-4.
  10. Raman, A., Sachdeva, R., Kumar, P., & Singh, P. (2025). Effect of SiGe-Composite Placement on Quantum Effects of a Nanowire FET Using NEGF. Silicon, 17(2), 259-266.

Other Publication

  1. Singh, P., Raman, A., Kumar, N., Dixit, A., Kumar, P., & Yadav, D. S. (2024, July). Investigation of Temperature Impacts on IV Characteristics to Analog/RF of Drain Underlap Based L-Shaped TFET. In 2024 IEEE 24th International Conference on Nanotechnology (NANO) (pp. 347-351). IEEE.
  2. Singh, P., Parmar, N., & Yadav, D. S. (2022, February). Assessment of ITCs on dual metal strip based charge plasma TFET: Analog to linearity analysis. In 2022 IEEE Delhi Section Conference (DELCON) (pp. 1-6). IEEE.
  3. Singh, P., & Yadav, D. S. (2021, December). Impact of tunneling length on analog/RF performance of L-shaped TFET. In 2021 First International Conference on Advances in Computing and Future Communication Technologies (ICACFCT) (pp. 114-118). IEEE.
  4. Singh, P., Samajdar, D. P., & Yadav, D. S. (2021, April). Doping and dopingless tunnel field effect transistor. In 2021 6th International Conference for Convergence in Technology (I2CT) (pp. 1-7). IEEE.
  5. Singh, P., Samajdar, D. P., & Yadav, D. S. (2021, April). A low power single gate l-shaped tfet for high frequency application. In 2021 6Th international conference for convergence in technology (i2CT) (pp. 1-6). IEEE.

Books

  1. Raman, A., Singh, P., Kumar, N., & Singh, S. (Eds.). (2025). Field-Effect Transistors Technology: From Sustainability to Next-Generation VLSI Design (1st ed.). CRC Press. https://doi.org/10.1201/9781003533535
  2. Kumar, N., Kumar, P., Dixit, A., & Singh, P. (Eds.). (2025). Classical to Quantum Transport in Multi-Dimensional Field Effect Transistors (1st ed.). CRC Press. https://doi.org/10.1201/9781003543923
  3. Dharmendra Singh Yadav, Prabhat Singh , " Nano-FET Devices: Miniaturization, Simulation, and Applications (Part 1) ", Bentham Science Publishers (2025). https://doi.org/10.2174/97898153138021250101
  4. Ashish Raman, Prabhat Singh, Naveen Kumar, Ravi Ranjan , " Semiconductor Nanoscale Devices: Materials and Design Challenges ", Bentham Science Publishers (2025). https://doi.org/10.2174/97898153132081250101

Patent

  1. Malvika, Jagritee Talukdar, Prabhat Singh, Ashutosh Srivastava, Gaurav Kumar Pandey, & Basab Das. (2025). Design registration for “Radio Frequency Rectenna” (Design No. 485484-001). The Patent Office, Government of India. Registered on January 28, 2025.